1. Field of the Invention
The present invention relates to a deinterleaver module of a wireless receiver, for example a IEEE 802.11a based Orthogonal Frequency Division Multiplexing (OFDM) receiver.
2. Background Art
Local area networks historically have used a network cable or other media to link stations on a network. Newer wireless technologies are being developed to utilize OFDM modulation techniques for wireless local area networking applications, including wireless LANs (i.e., wireless infrastructures having fixed access points), mobile ad hoc networks, etc. In particular, the IEEE Standard 802.11a, entitled “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High-speed Physical Layer in the 5 GHz Band”, specifies an OFDM PHY for a wireless LAN with data payload communication capabilities of up to 54 Mbps. The IEEE 802.11a Standard specifies a PHY system that uses fifty-two (52) subcarrier frequencies that are modulated using binary or quadrature phase shift keying (BPSK/QPSK), 16-quadrature amplitude modulation (QAM), or 64-QAM.
Hence, the IEEE Standard 802.11a specifies an OFDM PHY that provides high speed wireless data transmission with multiple techniques for minimizing data errors.
A particular concern in implementing an IEEE 802.11 based OFDM PHY in hardware involves providing a cost-effective, compact device the can be implemented in smaller wireless devices. Hence, implementation concerns typically involve cost, device size, and device complexity.
For example, the IEEE Standard 802.11a specifies that interleaving is performed on the transmit data stream using a two-step permutation to improve bit error rate performance in the presence of frequency-selective channel fading. In particular, adjacent coded bits are mapped in the first permutation onto non-adjacent subcarrier frequencies (i.e., “tones”) to prevent frequency-selective fading; depending on the modulation scheme used by the transmitter (e.g., BPSQ, QPSK, 16-QAM, or 64-QAM), adjacent coded bits also may be mapped in the second permutation onto alternately less and more significant bits in the constellation map (I+jQ) to reduce long runs of low reliability (i.e., least significant bit) values.
Hence, an OFDM PHY receiver configured for receiving IEEE 802.11a based wireless signals requires a deinterleaver to perform the two inverse permutations applied to the code words prior to transmission. However, the block size for each interleaving permutation is variable, based on the modulation scheme utilized by the transmitter (e.g., BPSK, QPSK, 16-QAM, or 64-QAM). Moreover, the mere storage of the serial data stream into successive memory locations of a random memory, followed by two-stage manipulation of the serial data stream following storage thereof to recover the deinterleaved data, may create substantial latency delays within the deinterleaver due to the processing overhead and the substantial memory read/write access operations necessary to deinterleave the received serial stream.
In addition, inefficient implementation of the OFDM PHY receiver may result in increased cost. For example, an inefficient implementation of the OFDM PHY may rely on a large read only memory (ROM) or inefficient state machines for deinterleaving operations such as memory addressing or deinterleaving sequence generation, increasing the size and cost of the device.